CiscoHiring

Hardware ASIC Packaging SI/PI Simulation and Design Lead

  • Remote, United States
  • Lead
  • Posted 2 weeks ago
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In one line

Hardware ASIC Packaging SI/PI Simulation and Design Lead is a remote role in the United States at a semiconductor and networking hardware company.

About the role

Part of a specialized ASIC group working on 2.5D fanout substrates and high-speed signaling for large-scale networking silicon.

At a glance

Pay
Not stated in the posting
Remote scope
Remote, United States
Seniority
Lead
Skills
Cadence Sigrity, 56G PAM4 SerDes, Transmission line theory, Channel modeling, BER prediction, Electromagnetics
Posted
14 Oct 2026
Last checked
29 Oct 2026

What you will do

  • Write and apply design rules for very high-speed signaling that meet power, performance and area targets
  • Run SI and PI analysis on substrates and work with layout engineers on interposer, substrate and PCB fixes
  • Build and document ASIC packages for high-volume release, including post-layout extraction and reports
  • Guide the signal integrity team and junior engineers, and set up design reviews and postmortems

What they look for

  • Electrical Engineering degree with 8+ years of relevant experience at bachelor level, 6+ with a master's, or 3+ with a PhD
  • High-speed design background covering transmission line theory, electromagnetics, S-parameters and impedance networks
  • Experience with 56G PAM4 SerDes, channel modeling and BER prediction
  • Hands-on pre- and post-layout SI/PI simulation in EDA tools such as Cadence Sigrity

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Connector URL
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ChatGPT

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Connector URL
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Muse

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Muse is available in the US only for now.

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How to connect

Questions about this job

Can I do this job remotely, and from which countries?

Yes. The posting lists Hardware ASIC Packaging SI/PI Simulation and Design Lead as a remote role for candidates in the United States.

What does this job pay?

The posting does not state a salary, so there is no figure to quote.

What experience is needed?

It is a lead role. The posting asks for: electrical Engineering degree with 8+ years of relevant experience at bachelor level, 6+ with a master's, or 3+ with a PhD; high-speed design background covering transmission line theory, electromagnetics, S-parameters and impedance networks; experience with 56G PAM4 SerDes, channel modeling and BER prediction. Skills it names include Cadence Sigrity, 56G PAM4 SerDes, Transmission line theory, Channel modeling.

How do I apply with Keywordise AI?

Select Apply with Keywordise AI, sign up and upload your CV. Keywordise writes a CV and a cover letter for this job from your real experience and applies for you. The 7-day free trial needs no card.

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